Compiler
translates a programming language to machine code.
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Formally Verified Optimizing C Compiler
CompCert
AbsInt Angewandte Informatik GmbH
Meet the highest levels of software assurance by compiling your application with the only C compiler that's been formally verified to be free of miscompilation issues. All safety properties verified on the source code, e.g. with Astre, are guaranteed to hold for the generated executable as well.
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IDE, Compiler And Debugger
RiscFree™ SDK
RiscFree is Ashling’s cross platform SDK including an IDE and Debugger, Integrated Compiler Toolchain, Project Manager and Build System, Single-shot Installer and Source-code Creation and Navigation. The integrated Debugger provides full Multi-core Homogeneous and Heterogeneous Support including debug and trace support via the Ashling Probes for RISC-V, Arm, ARC, ARC-V and MIPS based cores
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Wireless Fiber Inspection Probe
OCI-20BN-W
OCI-20BN-W is a portable optical fiber connector inspector for checking fiber and connector end-face cleanliness, ideal for bench top and fiber optic network installation technicians to eliminate error caused by poor quality or improper cleaning.OCI-20BN-W offers excellent viewing on connector/fiber end-face and is able to feature to record and save image/video of fiber end-face; It can be connected to PC or phone by WIFI.More than 40 assorted high-precision tips designed for inspection solutionsAngled/Lengthened tips for awkward positions.Connect smart phone for testing FiberEye2 is the application on an android or IOS smart phone to capture, display and record the fiber end-face image from the Wi-Fi probe.Connect tablet/laptop for testing EFD is the analysis software on Windows tablet/laptop to have dusts, and scratches on end face inspected, analyzed, compiled and reported
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Byte Craft Compilers
Byte Craft has been producing a select range of highly optimised compilers and development tools since 1976. The current processor targets are shown below. Byte Craft is, like Phaedrus Systems heavily involved in the international standards panels for C.
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ML/AI Low Power FPGA
iCE40 UltraPlus
*Flexible logic architecture with 2800 or 5280 4 input LUTs, customizable I/O, up to 80 kbits of embedded dual port memory and 1 Mbit of embedded single port memory*Ultra-low power advanced process with static current as low as 75 uA and 1-10 mA active current for most applications*High performance signal processing using DSP blocks with multiply and accumulate functions*Soft Neural Network IPs and compiler for flexible Machine Learning/AI implementation*FPGA design tools, demos and reference designs to kick start designs
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Smart Analysis for PHP
PHPSA
PHPSA is a development tool aimed at bringing complex analysis for PHP applications and libraries.*Static analysis*Code metrics*Branch prediction*Sandbox (AST) Compiler
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Elvior TestCast
TTCN-3
Elvior TestCast is a TTCN-3 test development and execution platform which includes TTCN-3 editor, TTCN-3 compiler and TTCN-3 executive. TestCast can be used for testing software or hardware components in a wide range of industry sectors. Candidate systems for testing with TestCast can be found from the industry sectors where TTCN-3 is widely used as an accepted generic test language - telecommunication, IOT, transport and automotive, military and defense. TestCast is ideal for incremental project development. It can be used for testing of an individual task or process. One can continue with the integration tests of a subsystem consisting of processes and later to integrate those subsystems and test them together as a whole software subsystem. It is even possible to continue to perform software/hardware integration tests where TestCast can be used to test software embedded in target hardware.
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Integrated Development Environment
All Cosmic C Cross Compilers for Windows include IDEA - Cosmic's own integrated development environment which is preconfigured for the the compiler it comes with. IDEA is designed specifically for developing embedded applications with Cosmic compilers. IDEA integrates an editor, project manager, graphical smart build/make facility, program analyzer, link file generator, documentation manager and ZAP debugger into one easy to use environment running under Windows Windows 7, XP and compatible. IDEA includes the following features:
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SpaceWire LabVIEW Driver VISA
137
STAR-Dundee's SpaceWire LabVIEW VISA driver has been implemented as a native LabVIEW driver, providing support for the STAR-Dundee PCI family of devices. Software written to control these devices may be deployed on any hardware platform that supports cPCI/PCI and NI-VISA, including both Windows based hosts and LabVIEW Real-Time targets, without requiring modifications to source code. The software is provided as LabVIEW source with password protected block diagrams, allowing users to compile for any target.
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FPGA PXIe High-Performance Digital I/O Card
GX3700e
The GX3700e is a user configurable, FPGA–based, 3U PXI Express card offering 160 digital I/O signals which can be configured for single-ended or differential interfaces. The card employs the Altera Stratix III FPGA, which can support SerDes data rates up to 1.2 Gb/s, digital I/O clock rates of 700 MHz, and features over 45,000 logic elements and 1.836 Kb of memory. The GX3700e is supplied with an integral expansion board providing access to the FPGA’s 160 I/Os. Alternatively, users can design their own custom expansion cards for specific applications - eliminating the need for additional external boards which are cumbersome and physically difficult to integrate into a test system. The design of the FPGA is done by using Altera’s free Quartus II Web Edition tool set. Once the user has compiled the FPGA design, the configuration file can be loaded directly into the FPGA or via an on-board EEPROM.
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The Imperas Instruction Set Simulator
ISS
The Imperas ISS is often the first simulation product used in an embedded software development project. The Imperas ISS allows the development and debug of code for the target architecture on an x86 host PC with the minimum of setup and effort. It simply requires the cross compilation of your application and running the ISS with an argument to specify the name of the application object.
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Stand-alone Software
N4391AU
The analysis software from the N4391A optical modulation analyzer can be used on your PC without any instrumentation. It offers all the analysis capabilities of the N4391A including its advanced signal processing algorithms for complex modulated optical signals. Use this software to process and analyze raw data stored as .sdf, .mat or .csv files from N4391A or N4392A measurements. This capability allows you to work with the data as if you would work directly in front of the instrument. It is an excellent tool for developing your own signal processing algorithms and testing them off-line, together with your MATLAB compiler. In addition, this software is an effective tool for learning basic and advanced concepts of complex optical modulation, based on stored files.
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FPGA PXI High-Performance Digital I/O Card
GX3702
The GX3702 is a user configurable, FPGA-based, 3U PXI card which offers 160 digital I/O signals which can be configured for single-ended or differential interfaces. The card employs the Altera Stratix III FPGA, which can support SerDes data rates up to 1.2 Gb/s, digital I/O clock rates of 700 MHz, and features over 45,000 logic elements and 1.836 Kb of memory. The GX3702 is supplied with an integral expansion board providing access to the FPGA's 160 I/Os and is pin for pin compatible with the NI PXI 7813R and 7811R FPGA cards . Alternatively, users can design their own custom expansion cards for specific applications - eliminating the need for additional external boards which are cumbersome and physically difficult to integrate into a test system. The design of the FPGA is done by using Altera's free Quartus II Web Edition tool set. Once the user has compiled the FPGA design, the configuration file can be loaded into the FPGA directly or via an on-board EEPROM.
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Code Optimizing C Compilers for Microchip PIC® and dsPIC® DSCs
CCS developed the first C Compiler for Microchip microcontrollers over 20 years ago and continues to provide software solutions to developers of embedded applications using PIC® MCU and PIC24/dsPIC® DSC devices. CCS compilers are easy to use and quick to learn. For the less experienced programmer, a detailed textbook explaining the C language and how it may be applied to PIC® microcontrollers.
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Development Tools
Renesas Electronics supports your entire development process for embedded applications through development tools such as easy-to use emulators and programming tools, as well as integrated development environments (the e² studio and CS+) that greatly enhance your development environment. The integrated development environments support use of the Solution Toolkit extension plug-ins, which accelerate development and reduce total costs. The CS+ also supports model-based development, which is handy if you are developing in-vehicle systems. We offer a rich range of licenses for compilers to suit various scales and types of development.
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Automatic Constraints Compiler & Manager
ConMan
ConMan is the first commercially available formal constraints compiler tool that automatically generates SDC for any level of hierarchy and for any mode of a SoC, thereby significantly shortening the timing closure cycle. ConMan provides an intuitive means of automatically compiling and managing sign-off quality correct-by-construction timing constraints for all applications.
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Build FPGA-based Processor Systems In Minutes
Lattice Propel Design Environment
Design Environment for Lattice FPGA-based Processor System Design - Lattice Propel is a complete set of graphical and command-line tools to create, analyze, compile, and debug both the hardware design of an FPGA-based processor system, and the software design for that processor system.
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Lattice SensAI Studio
Graphical interface based tool to help users built accelerated machine learning applications quickly. Select from a range of models pretrained to cover popular use cases, bring in your own data for additional training, validation the quality of training using TensorBoard, compile for Lattice’s FPGAs*Model Zoo with variety of models based on multiple architecture*Easy to use labeling, training, and compilation GUI*Docker container provided for installation on your own machine or server*Free license
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FPGA Image Processing (IP) Development Kit
ProcVision
Gidel’s Vision Pro Development Kit is an optimal solution for developing,validating, demonstrating and evaluating Image Processing (IP) andpipeline designs on FPGA.The suite is designed to provide a complete and convenient envelop enablingthe developer to focus strictly on the proprietary image processingdesign. The entire Vision Pro flow is within a single FPGA, independentof the final target application(s). The Vision Pro flow is composedof a pipeline that streams simulated data to the user image processingdesign under test (DUT) and then captures the design’s output streamfor displaying, storing, analysis and/or co-processing on host software.The entire process is performed on a single FPGA without the need foradditional peripheral connectivity or tools.Vision Pro suite is plug-and-play enabling the developer to begin at oncethe IP design development and validation. A simple design example providesthe developer immediate hands-on familiarization with the systemflow and supporting tools. The final design can be ported to any IntelFPGA device or other vendors’ devices (FPGA or ASIC) by replacing basiclibraries. To significantly reduce compilation time, initial design developmentmay be on a small FPGA device and later compiled for the targetdevice(s). The target implementation may use any FPGA board. For a fullImaging/Vision system solution, Gidel offers a number of off-the-shelfgrabbers and FPGA accelerators that are designed to utilize these imageprocessing blocks and Gidel Imaging Library (GIL).
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Boundary-Scan DIMM Socket Tester
ScanDIMM
Maximizing test coverage is an important piece in test procedure development. Unfortunately, not all designs have the necessary requirements in place to accommodate boundary-scan test methods on memory devices. ScanDIMM digital socket test modules are designed to overcome such limitations when testing DIMM sockets utilizing boundary-scan test techniques.ScanDIMM modules provide the capability to instantly turn any DIMM socket into a fully compliant IEEE-1149.1 device. Integration is as simple as assigning the included BSDL file to the reference designator of the target socket and compiling test vectors.In multi-socket systems, multiple ScanDIMM modules can be linked to provide even greater boundary-scan test depth.
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Compilers
Compilers for PIC, dsPIC/PIC24, PIC32, ARM, AVR, FT90x, 8051; GUI Development Software.
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Harmonics And Flicker Measuring System
ProfLine Series
The Teseq ProfLine system is a complete and cost effective Harmonics and Flicker measurement test system which compiles to the latest IEC/EN standards, including IEC 61000-3-2 and IEC 61000-3-3. The programmable power generation capability of up to 45 kVA (90 kVA and 145 kVA sources comprise multiple 45 kVA units) provides more than ample power to cater for a wide range of Equipment Under Test (EUT).
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Simulink models run on ADwin
ADsim
With ADsim, you easily run Simulink models on ADwin hardware. With a few clicks only, you insert inputs and outputs for the ADwin system as blocks into the model and start C code generation. After compilation, the model runs on the ADwin system in real-time with absolute timing precision and predictability reaching sample rates up to 100 kHz.
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Diab Compiler
For over 30 years, Wind River Diab Compiler has been helping developers create safety-critical applications in the automotive, industrial, medical, and aerospace industries. Diab Compiler can help software teams boost application performance, reduce memory footprint, and produce high-quality, standards-compliant object code for embedded systems.
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Fluid Analysis Information Management System
LubeTrak
LubeTrak compiles individual MicroLab oil reports into a consolidated database of historical information. This allows fleet managers to view and manage their MicroLab oil analysis results across the entire fleet. This fleet-level view can be used to assess the health of the entire fleet to optimize maintenance program and practices.
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TTCN-3 editor, compiler, debugger, execution
TestCast
TestCast is a full featured TTCN-3 based test auto-mation package. TTCN-3 test scripts can be generated automatically based on a model or written manually. Scripts can then be compiled and executed on a SUT and the results can be viewedand analysed in an intuitive graphical interface. TestCast is a comprehensive, all in one solution for all your test automation needs. TestCast can test both software and hardware from a wide array of industries and applications.
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Free Imperas RISC-V Instruction Set Simulator
riscvOVPsim
*RiscvOVPsim - RISC-V Instruction Set Simulator (ISS) - fast, simple, easy to use, cross software development for embedded systems*The riscvOVPsim ISS is an ideal starting point for an embedded software development project. *RiscvOVPsim allows the development and debug of code for the target RISC-V processor on an x86 host PC with the minimum of setup and effort. It simply requires the cross compilation of your application and running riscvOVPsim with an argument to specify the name of the application object.
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Cloud Edition
HES-DVM Proto
HES-DVM Proto CE is the Cloud Edition of Aldec’s HES-DVM software product used for design compilation and partitioning into multi-FPGA prototyping platforms. It is available in Amazon AWS Marketplace as an Amazon Machine Image (AMI) built upon the Amazon Linux image as a base with preinstalled Aldec HES-DVM software. The HES-DVM Proto CE combines Electronic Design Automation software for design partitioning and compute platform scalability of Amazon Elastic Compute Cloud (Amazon EC2).
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16-Axis PCIe EtherCAT MainDevice Motion Controller
PCIe-8332
ADLINK PCIe-8332 is a hardware-based EtherCAT motion controller able to support up to 16 synchronized axes and over 10,000 points simultaneously. The PCIe-8332 features dedicated isolated emergency stop input (EMG), and configurable isolated high-speed digital input as not only generic sensor input but also pulsar input, with up to 1MHz input frequency. Optimum jitter control is provided in minimal cycles of 250µs to optimize synchronous I/O performance for vertical automation applications in semiconductor, electronic manufacturing, and others. The PCIe-8332 provides an out-of-shell application-ready (APS) function library to generate multi-dimensional, highly synchronized, time-deterministic event-triggered motion & I/O control. A wide range of compatible 3rd party SubDivice are easily designed with ADLINK's APS function library. ADLINK's MotionCreatorPro 2 utility is fully compliant with the Microsoft Windows environment, that allows complete EtherCAT motion and I/O configuration and function evaluation as well as compiling program download functions.
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Integrated Development Environment for the Creation and Execution of IEEE1641 Test Programs
SigBase
SigBase is an Integrated Development Environment for the creation and execution of IEEE 1641 test programs. It supports the development of tests using flow-charting techniques and the graphical design of signals using newWaveX. It includes fully integrated compilation and signal path allocation software that determines the appropriate instrument and switch path for each signal and test. The run-time system, which is also available as a separate product for use on multiple test stations, controls the operation of the ATS and can provide test results in ATML format.
